2. Interfaces

Jaguar provides a wide variety of interfaces.

Fig. 2.1 Jaguar interfaces overview

2.1. Power Supply

In order to power the board, connect the appropriate cable to the highlighted connector shown in the figure below. The Jaguar power supply voltage is 12-24V.

Note

Be careful when connecting the power cable since all three terminal block connectors are of the same type.

Fig. 2.2 Power connector

Table 2.1 Compatible mating connectors

Manufacturer	Partnumber	Description
Würth	691361100003	Vertical
Würth	691363110003	Horizontal with hook on wire Side
Würth	691366110003	Horizontal with hook on back Side
Würth	691304100003	Screwless Plug Vertical Entry Low Profile

2.2. USB Serial Console

Jaguar contains an on-board Silicon Labs CP2102N USB-serial converter.

The serial converter is connected to UART2 on the SoC which is exposed as /dev/ttyS2 in Linux.

Connect a Micro-USB cable to the Micro-USB as highlighted below:

Fig. 2.3 USB UART

For macOS and Windows, drivers are available from Silicon Labs: https://www.silabs.com/software-and-tools/usb-to-uart-bridge-vcp-drivers

A terminal emulation program is required to access the serial console.

Table 2.2 Terminal emulators recommendations

Operation System	Terminal Emulator	URL	Example Commandline
Microsoft Windows	PuTTY	https://www.chiark.greenend.org.uk/~sgtatham/putty/
	MobaXterm	https://mobaxterm.mobatek.net/
	Tera Term	https://teratermproject.github.io/index-en.html
macOS	cu		cu -s 115200 -l /dev/cu.SLAB_USBtoUART
Linux	picocom	https://github.com/npat-efault/picocom/	picocom -b 115200 /dev/ttyUSB0
	minicom	https://salsa.debian.org/minicom-team/minicom/	minicom -b 115200 -D /dev/ttyUSB0
	GNU Screen	https://www.gnu.org/software/screen/	screen /dev/ttyUSB0 115200

Note

Make sure to disable software flow-control (XON/XOFF). Otherwise, serial input may not be recognized.

After system boot-up with the Jaguar Debian development image, the login console appears on the terminal:

jaguar-debos login:

You can log with one of the following credentials:

Table 2.3 Default User

Username	Password
root	root
user	123123

2.3. Buttons

Fig. 2.4 Buttons and Download USB Type-C port

The control buttons provide the following functionality:

• RST triggers a board reset.

• BIOS forces alternate boot sequence.

2.3.1. Boot Order

The used boot order of the Jaguar board depends on the state of the BIOS button.

	Default	BIOS pressed
1	eMMC storage	SD card
2	SD card	USB loader
3	USB loader

If no bootloader is found on any storage device, Jaguar will go into USB loader mode, showing up as a USB device with VID:PID 2207:350b on the USB port P11 marked Download.

Once booted into Linux, presses on the BIOS button will trigger a KEY_VENDOR input event on the /dev/input/by-path/platform-adc-keys-event input device:

$ evtest /dev/input/by-path/platform-adc-keys-event
Input driver version is 1.0.1
Input device ID: bus 0x19 vendor 0x1 product 0x1 version 0x100
Input device name: "adc-keys"
Supported events:
  Event type 0 (EV_SYN)
  Event type 1 (EV_KEY)
    Event code 360 (KEY_VENDOR)
Properties:
Testing ... (interrupt to exit)
Event: time 1695722632.280609, type 1 (EV_KEY), code 360 (KEY_VENDOR), value 1
Event: time 1695722632.280609, -------------- SYN_REPORT ------------
Event: time 1695722632.383952, type 1 (EV_KEY), code 360 (KEY_VENDOR), value 0
Event: time 1695722632.383952, -------------- SYN_REPORT ------------

2.3.2. Control buttons remotely

The functionality of each button (RST and BIOS) is controllable via the P20 micro-USB connector also used for the serial console (Fig. 2.3 USB UART).

CHERRY provides a Python tool to that effect:

git clone https://git.embedded.cherry.de/som-tools.git

This tool depends on PyUSB and libusb which can be installed on Debian-based systems with:

apt-get install python3-usb

After connecting the micro-USB cable between Jaguar and your PC, check it is properly detected by running:

$ ./usb-control/jaguar.py list
Found 1 board:
0: daa0c7cb9062ed11baff9a1e8680196e Jaguar

To control the power of Jaguar:

./usb-control/jaguar.py on
./usb-control/jaguar.py off
./usb-control/jaguar.py cycle

To simulate a press (and hold) of the BIOS button:

./usb-control/jaguar.py biosdisable

Warning

With this command, the state of the BIOS button functionality as managed by the P20 micro-USB connector is kept until the micro-USB cable is disconnected regardless of the state of the actual BIOS physical button and the power state of Jaguar.

To go back to normal boot mode (i.e. what typically happens when BIOS physical button is not pressed):

./usb-control/jaguar.py normalboot

To get the current state of Jaguar:

$ ./usb-control/jaguar.py status
Board is ON (Normal boot (if not overruled by BIOS button))

Note

If multiple Jaguar are connected to the same PC, it is recommended to specify the serial of the Jaguar the command is intended for with each command. The serial can be found with ./usb-control/jaguar.py list and it can be passed to commands with --serial <serial-id>.

To temporarily boot from SD card (or entering USB loader if there is no valid bootable binary on the attached SD card):

./usb-control/jaguar.py cycle-to-maskrom

On the next power cycle, reboot or CPU reset, the system will boot normally. This is particularly useful to flash the eMMC on Jaguar without manual intervention. If this is something you are after, once the above command is run, follow the steps in Section 7.2.2 Enter USB flashing mode.

2.4. FAN

A PWM controlled fan with tacho signal can be connected. The supply voltage can be selected by changing a 0-Ohm resistor, the default supply is 12 V.

Table 2.4 Fan supply (bold default)

Resistor	Fan supply
R314	Main supply voltage
R315	12 V
R316	5 V

Table 2.5 Fan mating connector

Manufacturer	Partnumber
JST	PHR-4

Fig. 2.5 FAN connection

2.5. CAN

Jaguar supports up to three CAN busses. CAN0 has an on-board transceiver and supports up to 1 MBaud data rate. CAN1 and CAN2 are available on the Mezzanine Connector and require a transceiver on the Mezzanine board.

Fig. 2.6 CAN connector

Table 2.6 Compatible mating connectors

Manufacturer	Partnumber	Description
Würth	691361100003	Vertical
Würth	691363110003	Horizontal with hook on wire Side
Würth	691366110003	Horizontal with hook on back Side
Würth	691304100003	Screwless Plug Vertical Entry Low Profile

2.6. RS-485

Jaguar supports half-duplex RS-485. The RS-485 interface uses UART3 on the SoC which is exposed as /dev/ttyS3 in Linux.

Fig. 2.7 RS-485 connector

Table 2.7 Compatible mating connectors

Manufacturer	Partnumber	Description
Würth	691361100003	Vertical
Würth	691363110003	Horizontal with hook on wire Side
Würth	691366110003	Horizontal with hook on back Side
Würth	691304100003	Screwless Plug Vertical Entry Low Profile

2.7. Battery

A CR2032 coin cell can be used to supply the on-board real-time-clock. The coin cell is only used when Jaguar is not supplied power from an external source.

2.8. Mezzanine Connector

Jaguar has an 80-pin connector for extensions board. Most pins have multiple functions that can be selected via software configuration. See Table 2.10 Mezzanine multiplex functions.

Table 2.8 Compatible mating connectors

Manufacturer	Partnumber	Description
Hirose	ER8-80P-0.8SV-2H	2mm height plug
Hirose	ER8-80P-0.8SV-5H	5mm height plug

Table 2.9 Mezzanine connector pinout

Pin	Function	Pin	Function
1	CP2102_POWER_EN	2	CAM0_STROBE
3	ADC_IN2	4	CAM1_STROBE
5	WDTRIG#	6	I2C1_SCL
7	GND	8	I2C1_SDA
9	CAM3_D1_P	10	GND
11	CAM3_D1_N	12	WDOUT (v1.3+)
13	GND	14	GPIO3_A0
15	CAM3_D0_P	16	GPIO3_A1
17	CAM3_D0_N	18	GPIO3_A2
19	GND	20	GPIO3_A3
21	CAM3_CLK0_P	22	GPIO3_A4
23	CAM3_CLK0_N	24	GPIO3_A5
25	GND	26	GPIO3_A6
27	CAM3_MLCK	28	GPIO3_B1
29	CAM3_RST	30	GPIO3_B2
31	CAM2_D1_P	32	GPIO3_B3
33	CAM2_D1_N	34	GPIO3_B4
35	GND	36	GPIO3_B5
37	CAM2_D0_P	38	GPIO3_B6
39	CAM2_D0_N	40	GPIO3_B7
41	GND	42	GPIO3_C0
43	CAM2_CLK0_P	44	GPIO3_C1
45	CAM2_CLK0_N	46	GPIO3_C2
47	GND	48	GPIO3_C3
49	CAM2_MCLK	50	GPIO3_C4
51	CAM2_RST	52	GPIO3_C5
53	PCIE20_0_RX_P	54	GPIO3_C6
55	PCIE20_0_RX_N	56	GPIO3_C7
57	GND	58	GPIO3_D0
59	PCIE20_0_TX_P	60	GPIO3_D1
61	PCIE20_0_TX_N	62	GPIO3_D2
63	GND	64	GPIO3_D3
65	PCIE20_0_CLK_P	66	GPIO3_D4
67	PCIE20_0_CLK_N	68	GPIO3_D5
69	GND	70	GND
71	VCC_1V8	72	VCC_3V3
73	VCC_1V8	74	VCC_3V3
75	GND	76	GND
77	VCC_IN	78	VCC_5V0
79	VCC_IN	80	VCC_5V0

Fig. 2.8 Mezzanine connector pin numbers

Note

CAM0_STROBE is routed to the MIPI-CSI P14’s STROBE pin (see Table 2.13 MIPI-CSI P14 connector pinout).

Note

CAM1_STROBE is routed to the MIPI-CSI P15’s STROBE pin (see Table 2.19 MIPI-CSI P15 connector pinout).

Table 2.10 Mezzanine multiplex functions

Pin Number	GPIO Name	PWM	SDIO	I2S	I2C
6	GPIO1_D2	PWM0_M1			I2C1_SCL_M4
8	GPIO1_D3	PWM1_M1			I2C1_SDA_M4
14	GPIO3_A0	PWM10_M0	SDIO_D0_M1	I2S3_MCLK	I2C6_SDA_M4
16	GPIO3_A1	PWM11_IR_M0	SDIO_D1_M1	I2S3_SCLK	I2C6_SCL_M4
18	GPIO3_A2		SDIO_D2_M1	I2S3_LRCK
20	GPIO3_A3		SDIO_D3_M1	I2S3_SDO
22	GPIO3_A4		SDIO_CMD_M1	I2S3_SDI
24	GPIO3_A5		SDIO_CLK_M1		I2C4_SDA_M0
26	GPIO3_A6				I2C4_SCL_M0
27	GPIO3_B0	PWM9_M0
28	GPIO3_B1	PWM2_M1
30	GPIO3_B2	PWM3_IR_M1		I2S2_SDI_M1
32	GPIO3_B3			I2S2_SDO_M1
34	GPIO3_B4			I2S2_MCLK_M1
36	GPIO3_B5	PWM12_M0		I2S2_SCLK_M1
38	GPIO3_B6	PWM13_M0		I2S2_LRCK_M1
40	GPIO3_B7				I2C3_SCL_M1
42	GPIO3_C0				I2C3_SDA_M1
44	GPIO3_C1
46	GPIO3_C2	PWM14_M0
48	GPIO3_C3	PWM15_IR_M0
49	GPIO3_A7	PWM8_M0
50	GPIO3_C4
52	GPIO3_C5
54	GPIO3_C6
56	GPIO3_C7				I2C5_SCL_M0
58	GPIO3_D0	PWM8_M2			I2C5_SDA_M0
60	GPIO3_D1	PWM9_M2
62	GPIO3_D2
64	GPIO3_D3	PWM10_M2
66	GPIO3_D4
68	GPIO3_D5	PWM11_IR_M3

Table 2.11 Mezzanine multiplex functions (cont.)

Pin Number	GPIO Name	CAN	PCIE	UART
6	GPIO1_D2			UART4_TX_M0
8	GPIO1_D3			UART4_RX_M0
14	GPIO3_A0
16	GPIO3_A1
18	GPIO3_A2			UART8_TX_M1
20	GPIO3_A3			UART8_RX_M1
22	GPIO3_A4			UART8_RSTN_M1
24	GPIO3_A5			UART8_CTSN_M1
26	GPIO3_A6
27	GPIO3_B0
28	GPIO3_B1
30	GPIO3_B2
32	GPIO3_B3
34	GPIO3_B4
36	GPIO3_B5	CAN1_RX_M0
38	GPIO3_B6	CAN1_TX_M0
40	GPIO3_B7
42	GPIO3_C0
44	GPIO3_C1
46	GPIO3_C2
48	GPIO3_C3
49	GPIO3_A7
50	GPIO3_C4	CAN2_RX_M0		UART5_TX_M1
52	GPIO3_C5	CAN2_TX_M0		UART5_RX_M1
54	GPIO3_C6
56	GPIO3_C7		PCIE20X1_2_CLKREQN_M0
58	GPIO3_D0		PCIE20X1_2_WAKEN_M0	UART4_RX_M1
60	GPIO3_D1		PCIE20X1_2_PERSTN_M0	UART4_TX_M1
62	GPIO3_D2			UART9_RTSN_M2
64	GPIO3_D3			UART9_CTSN_M2
66	GPIO3_D4			UART9_RX_M2
68	GPIO3_D5			UART9_TX_M2

Table 2.12 Mezzanine multiplex functions (cont.)

Pin Number	GPIO Name	ETH	MIPI_CAMERA_CLK	SPI
6	GPIO1_D2			SPI1_CLK_M2
8	GPIO1_D3			SPI1_CS0_M2
14	GPIO3_A0	GMAC1_TXD2		SPI4_MISO_M1
16	GPIO3_A1	GMAC1_TXD3		SPI4_MOSI_M1
18	GPIO3_A2	GMAC1_RXD2		SPI4_CLK_M1
20	GPIO3_A3	GMAC1_RXD3		SPI4_CS0_M1
22	GPIO3_A4	GMAC1_TXCLK		SPI4_CS1_M1
24	GPIO3_A5	GMAC1_RXCLK	MIPI_CAMERA0_CLK_M1
26	GPIO3_A6	ETH1_REFCLKO_25M	MIPI_CAMERA1_CLK_M1
27	GPIO3_B0	GMAC1_RXD1	MIPI_CAMERA3_CLK_M1
28	GPIO3_B1	GMAC1_RXDV_CRS	MIPI_CAMERA4_CLK_M1
30	GPIO3_B2	GMAC1_TXER
32	GPIO3_B3	GMAC1_TXD0
34	GPIO3_B4	GMAC1_TXD1
36	GPIO3_B5	GMAC1_TXEN
38	GPIO3_B6	GMAC1_MCLKINOUT
40	GPIO3_B7	GMAC1_PTP_REF_CLK		SPI1_MOSI_M1
42	GPIO3_C0	GMAC_PPSTRIG		SPI1_MISO_M1
44	GPIO3_C1	GMAC1_PPSCLK		SPI1_CLK_M1
46	GPIO3_C2	GMAC1_MDC		SPI1_CS0_M1
48	GPIO3_C3	GMAC1_MDIO		SPI1_CS1_M1
49	GPIO3_A7	GMAC1_RXD0	MIPI_CAMERA2_CLK_M1
50	GPIO3_C4			SPI3_CS0_M3
52	GPIO3_C5			SPI3_CS1_M3
54	GPIO3_C6			SPI3_MISO_M3
56	GPIO3_C7			SPI3_MOSI_M3
58	GPIO3_D0			SPI3_CLK_M3
60	GPIO3_D1			SPI0_MISO_M3
62	GPIO3_D2			SPI0_MOSI_M3
64	GPIO3_D3			SPI0_CLK_M3
66	GPIO3_D4			SPI0_CS0_M3
68	GPIO3_D5			SPI0_CS1_M3

Warning

The clock output on GPIO3_A5 via the MIPI_CAMERA0_CLK_M1 function is also output on the MIPI-CSI P15 IMU_CS (pin 24) connector. This means if GPIO3_A5 is used as a camera clock, the clock rate for the camera connected to MIPI-CSI P15 (if using the IMU_CS signal from Jaguar in the MIPI_CAMERA0_CLK_M0 function) must be constant and identical to the one connected on the Mezzanine adapter, as well as running regardless of which camera is currently in use.

The clock output on GPIO3_A6 via the MIPI_CAMERA1_CLK_M1 function is also output on the MIPI-CSI P14 CAM_CLK (pin 2) connector. This means if GPIO3_A6 is used as a camera clock, the clock rate for the camera connected to MIPI-CSI P14 (if using the CAM_CLK signal from Jaguar in the MIPI_CAMERA1_CLK_M0 function) must be constant and identical to the one connected on the Mezzanine adapter, as well as running regardless of which camera is currently in use.

The clock output on GPIO3_A7 via the MIPI_CAMERA2_CLK_M1 function is also output on the MIPI-CSI P15 CAM_CLK (pin 2) connector. This means if GPIO3_A7 is used as a camera clock, the clock rate for the camera connected to MIPI-CSI P15 (if using the CAM_CLK signal from Jaguar in the MIPI_CAMERA2_CLK_M0 function) must be constant and identical to the one connected on the Mezzanine adapter, as well as running regardless of which camera is currently in use.

CHERRY therefore recommends to use MIPI_CAMERA3_CLK_M1 or MIPI_CAMERA4_CLK_M1 instead to avoid such limitations.

Warning

PWM0 is only usable if PWM (pin 20) on MIPI-CSI P14 connector is not used in the PWM function.

Warning

PWM1 is only usable if PWM (pin 20) on MIPI-CSI P15 connector is not used in the PWM function.

Warning

PWM3 is only usable if IMU_INT2 (pin 18) on MIPI-CSI P15 connector is not used in the PWM function.

Warning

PWM11 is only usable if both IMU_SDA (pin 22) and CAM_SDA (pin 27) on MIPI-CSI P14 connector are not used in the PWM function.

Warning

PWM13 is only usable if CAM_MCLK (pin 2) on MIPI-CSI P15 connector is not used in the PWM function.

Warning

PWM14 is only usable if IMU_CS (pin 24) on MIPI-CSI P14 connector is not used in the PWM function.

Warning

PWM15 is only usable if IMU_INT2 (pin 18) on MIPI-CSI P14 connector is not used in the PWM function.

Warning

If you have not explicitly requested a special flavor of Jaguar, the following limitation does not apply to your unit.

SPI0 is only available for the default flavor of Jaguar. There is a hardware variant of Jaguar that has SPI0 exposed to MIPI-CSI P14 IMU_SDA/IMU_SDL/IMU_CS/IMU_SA0 (pin 22, 23, 24, 25). For that variant, SPI0 must not be used on the Mezzanine Connector if a camera is connected to MIPI-CSI P14 connector.

Fig. 2.9 Mezzanine board dimensions (bottom view)

2.9. MIPI-CSI P14

Fig. 2.10 MIPI-CSI P14 Connector

Jaguar has two MIPI-CSI 2-lane camera connectors on its main PCBA. This section describes the MIPI-CSI P14 camera connector.

Most pins have multiple functions that can be selected via software configuration. See Table 2.14 MIPI-CSI P14 multiplex functions.

Table 2.13 MIPI-CSI P14 connector pinout

Pin	Function	Pin	Function
1	GND	34	GND
2	CAM_MCLK	33	CAM_V2P8 (2.8V)
3	GND	32	GND
4	CAM_RST	31	IMU_V2P8 (2.8V)
5	STROBE	30	V1P8
6	GND	29	GND
7	MDP0	28	CAM_SCL
8	MDN0	27	CAM_SDA
9	GND	26	GND
10	MDP1	25	IMU_SA0
11	MDN1	24	IMU_CS
12	GND	23	IMU_SCL
13	MCP	22	IMU_SDA
14	MCN	21	CAM_DVDD (1.2V)
15	GND	20	PWM
16	IMU_INT1	19	IMU_INT3
17	VSYNC	18	IMU_INT2

Note

Unless specified, all pins are 1.8V.

Note

STROBE is routed to the Mezzanine Connector’s CAM0_STROBE pin (see Table 2.9 Mezzanine connector pinout).

Note

VSYNC is routed to the MIPI-CSI P15’s VSYNC pin (see Table 2.19 MIPI-CSI P15 connector pinout).

Table 2.14 MIPI-CSI P14 multiplex functions

Pin Number	GPIO Name	PWM	I2C	SPI
2	GPIO1_B6
4	GPIO0_B0
16	GPIO1_C0
18	GPIO1_C6	PWM15_IR_M2	I2C4_SDA_M4
19	GPIO1_C7		I2C4_SCL_M4
20	GPIO1_A2	PWM0_M2	I2C4_SDA_M3
22	GPIO1_C4	PWM11_IR_M2	I2C2_SDA_M3
23	GPIO1_C5		I2C2_SCL_M3
24	GPIO4_B2	PWM14_M1		SPI0_CS0_M1
25	GPIO1_D5
27	GPIO1_C4	PWM11_IR_M2	I2C2_SDA_M3
28	GPIO1_C5		I2C2_SCL_M3

Table 2.15 MIPI-CSI P14 multiplex functions (cont.)

Pin Number	GPIO Name	SPDIF	PDM	MIPI_CAMERA_CLK
2	GPIO1_B6	SPDIF0_TX_M0		MIPI_CAMERA1_CLK_M0
4	GPIO0_B0
16	GPIO1_C0
18	GPIO1_C6		PDM0_CLK0_M0
19	GPIO1_C7
20	GPIO1_A2
22	GPIO1_C4		PDM0_CLK1_M0
23	GPIO1_C5
24	GPIO4_B2
25	GPIO1_D5		PDM0_SDI0_M0
27	GPIO1_C4		PDM0_CLK1_M0
28	GPIO1_C5

Note

GPIO1_B6 is output-only from Jaguar and is never floating thanks to active bus hold circuitry.

Note

GPIO1_A2 is output-only from Jaguar in the default hardware variant.

The pin is never floating thanks to active bus hold circuitry.

Another hardware variant (upon request) has GPIO1_A2 input-only to Jaguar.

Note that GPIO1_A3 as exposed on MIPI-CSI P15 follows the same restrictions, that is, it is either output-only or input-only and matches with GPIO1_A2.

Note

If you have not explicitly requested a special flavor of Jaguar, this note does not apply to your unit.

Jaguar has a hardware variant where VSYNC from MIPI-CSI P14 is routed to the main SoC instead of routed to VSYNC from MIPI-CSI P15.

In that case, VSYNC can be used as a GPIO via GPIO0_A4 (already pulled down with 10kOhm).

Warning

In Jaguar default hardware variant, IMU_SDA is routed to the same SoC pin as CAM_SDA, therefore they share the same pin function.

Warning

In Jaguar default hardware variant, IMU_SCL is routed to the same SoC pin as CAM_SCL, therefore they share the same pin function.

Note

If you have not explicitly requested a special flavor of Jaguar, this note does not apply to your unit.

Jaguar has a hardware variant where IMU_SDA is routed to a different SoC pin.

The following would then apply:

Table 2.16 MIPI-CSI P14 IMU_SDA option

Pin Number	GPIO Name	SPI
22	GPIO4_A1	SPI0_MOSI_M1

Note

If you have not explicitly requested a special flavor of Jaguar, this note does not apply to your unit.

Jaguar has a hardware variant where IMU_SCL is routed to a different SoC pin.

The following would then apply:

Table 2.17 MIPI-CSI P14 IMU_SCL option

Pin Number	GPIO Name	SPI
23	GPIO4_A2	SPI0_CLK_M1

Note

Jaguar has a hardware variant (upon request) where IMU_SA0 is routed to a different SoC pin.

The following would then apply:

Table 2.18 MIPI-CSI P14 IMU_SA0 option

Pin Number	GPIO Name	SPI
25	GPIO4_A0	SPI0_MISO_M1

Warning

I2C4 is also exposed on Mezzanine Connector. It is recommended to have this bus only used on MIPI-CSI P14 or the Mezzanine Connector but not both.

2.10. MIPI-CSI P15

Fig. 2.11 MIPI-CSI P15 Connector

Jaguar has two MIPI-CSI 2-lane camera connectors on its main PCBA. This section describes the MIPI-CSI P15 camera connector.

Most pins have multiple functions that can be selected via software configuration. See Table 2.20 MIPI-CSI P15 multiplex functions.

Table 2.19 MIPI-CSI P15 connector pinout

Pin	Function	Pin	Function
1	GND	34	GND
2	CAM_MCLK	33	CAM_V2P8 (2.8V)
3	GND	32	GND
4	CAM_RST	31	IMU_V2P8 (2.8V)
5	STROBE	30	V1P8
6	GND	29	GND
7	MDP0	28	CAM_SCL
8	MDN0	27	CAM_SDA
9	GND	26	GND
10	MDP1	25	IMU_SA0
11	MDN1	24	IMU_CS
12	GND	23	IMU_SCL
13	MCP	22	IMU_SDA
14	MCN	21	CAM_DVDD (1.2V)
15	GND	20	PWM
16	IMU_INT1	19	IMU_INT3
17	VSYNC	18	IMU_INT2

Note

Unless specified, all pins are 1.8V.

Note

STROBE is routed to the Mezzanine Connector’s CAM1_STROBE pin (see Table 2.9 Mezzanine connector pinout).

Note

VSYNC is routed to the MIPI-CSI P14’s VSYNC pin (see Table 2.13 MIPI-CSI P14 connector pinout).

Table 2.20 MIPI-CSI P15 multiplex functions

Pin Number	GPIO Name	PWM	I2C	SPI
2	GPIO1_B7	PWM13_M2
4	GPIO4_C6	PWM7_IR_M3
16	GPIO2_C4
18	GPIO1_A7	PWM3_IR_M3
19	GPIO1_B0
20	GPIO1_A3	PWM1_M2
22			I2C7_SDA_M0
23			I2C7_SCL_M0
24	GPIO4_B1			SPI0_CS1_M1
25	GPIO2_C5
27			I2C7_SDA_M0
28			I2C7_SCL_M0

Table 2.21 MIPI-CSI P15 multiplex functions (cont.)

Pin Number	GPIO Name	SPDIF	MIPI_CAMERA_CLK
2	GPIO1_B7	SPDIF1_TX_M0	MIPI_CAMERA2_CLK_M0
4	GPIO4_C6
16	GPIO2_C4
18	GPIO1_A7
19	GPIO1_B0
20	GPIO1_A3
22
23
24	GPIO4_B1	SPDIF1_TX_M1	MIPI_CAMERA0_CLK_M0
25	GPIO2_C5
27
28

Note

GPIO1_B7 is output-only from Jaguar and is never floating thanks to active bus hold circuitry.

Note

If you have not explicitly requested a special flavor of Jaguar, this note does not apply to your unit.

Jaguar has a hardware variant where VSYNC from MIPI-CSI P15 is routed to the main SoC instead of routed to VSYNC from MIPI-CSI P14.

In that case, VSYNC can be used as a GPIO via GPIO0_B2.

Note

GPIO1_A7 and GPIO1_B0 are output-only from Jaguar in the default hardware variant.

The pin is never floating thanks to active bus hold circuitry.

Another hardware variant (upon request) has GPIO1_A7 and GPIO1_B0 input-only to Jaguar.

Note

GPIO1_A3 is output-only from Jaguar in the default hardware variant.

The pin is never floating thanks to active bus hold circuitry.

Another hardware variant (upon request) has GPIO1_A3 input-only to Jaguar.

Note that GPIO1_A2 as exposed on MIPI-CSI P14 follows the same restrictions, that is it is either output-only or input-only and matches with GPIO1_A3.

Warning

There already are devices on I2C buses:

• I2C7:

  • 0x48 (Secure Element)

  • 0x54 and 0x55 (EEPROM)

• I2C8:

  • 0x22 (FUSB302 for P12 USB-C connector)

Note

If you have not explicitly requested a special flavor of Jaguar, this note does not apply to your unit.

Jaguar has a hardware variant (upon request) where IMU_SDA is routed to a different SoC pin.

In that case, IMU_SDA exposes the I2C8_SDA_M2 signal.

Note

If you have not explicitly requested a special flavor of Jaguar, this note does not apply to your unit.

Jaguar has a hardware variant (upon request) where IMU_SCL is routed to a different SoC pin.

In that case, IMU_SCL exposes the I2C8_SCL_M2 signal.

Note

IMU_SA0 is already pulled down with 1kOhm.

2.11. Gigabit Ethernet

Jaguar has an RJ45 connector providing Gigabit Ethernet connectivity.

Two LEDs are integrated into the connector:

• Orange LED on the left: Power and activity indicator

  • Off = power off

  • On = power on

  • Blinking = active network traffic

• Green LED on the right: Link indicator

  • Off = no link

  • On = link (any speed)

2.12. M.2 Key-M Connector P3

This interface supports common PCIe NVMes in 2280 form factor.

The data interface is PCIe 3.0 x4.

SATA SSDs are not supported.

Several NVMes that we use internally with good results are listed below:

• Crucial P3 500GB (CT500P3SSD8)

• WD Blue SN580 500GB

• Samsung SSD 980 250GB

• Samsung SSD 960 EVO 250GB

2.13. M.2 Key-E Connector P2

This interface supports common Wifi+Bluetooth modules in 2230 form factor.

The data interface is PCIe 2.0 x1 and USB 2.0.

A Wifi+Bluetooth module that we use internally with good results is:

• Intel Wireless-AC 9260 (9260.NGWG.NV) with any IPEX MHF4 antenna

Section 10 Wireless support describes how to use this module.

2.14. USB-C

P11 and P12 are full-featured USB-C jacks. They provide USB 3.0 SuperSpeed up to 5Gbps and support DisplayPort 1.4a output up to 8Gbps.

2.15. USB-C DisplayPort Alternate Mode

Connecting a USB-C to DisplayPort cable automatically switches the USB-C port to DisplayPort output mode.

Once display output is enabled dmesg -w will show a message block prefixed with rockchip-vop2 and dw-dp:

rockchip-vop2 fdd90000.vop: [drm:vop2_crtc_atomic_enable] Update mode to 1920x1080p60, type: 10(if:DP1, flag:0x0) for vp0 dclk: 148500000
rockchip-vop2 fdd90000.vop: [drm:vop2_crtc_atomic_enable] dclk_out0 div: 2 dclk_core0 div: 2
rockchip-vop2 fdd90000.vop: [drm:vop2_crtc_atomic_enable] set dclk_vop0 to 148500000, get 148500000
dw-dp fde60000.dp: full-training link: 4 lanes at 2700 MHz
dw-dp fde60000.dp: clock recovery succeeded
dw-dp fde60000.dp: channel equalization succeeded
rockchip-vop2 fdd90000.vop: vop enable intf:400

If the display output does not get enabled you will not see these messages.

2.15.1. Known Limitation: P12 Connection Order

The USB-C jack P12 (the one closer to the USB-A jack) is, with some cables, sensitive to the order of connection.

On some cables, connecting the USB-C side first and the DisplayPort side second will not enable display output.

You can confirm the problem by running the following command and observing the output:

cat /sys/devices/platform/feca0000.i2c/i2c-8/8-0022/typec/port?/port?.0\
/partner/displayport/configuration

With a cable affected by the problem (“bad”), it will read:

USB [source] sink

With an unaffected (“good”) cable, it will read:

USB source [sink]

Contact us for a list of known-good USB-C to DisplayPort cables.

2.15.2. Known Limitation: Monitor Resolution

Monitor resolutions other than FullHD 1920x1080 may fail to enable display output.

2.15.3. Known Limitation: Failed Negotiation Related To Console Loglevel

The USB-C DisplayPort Alternate Mode negotiation is sensitive to delays introduced by kernel messages printed to the serial console.

Which messages are printed to the serial console is controlled by the kernel’s loglevel parameter, a higher number means more details and more messages. Note that regardless of the loglevel setting, all messages can be seen via dmesg.

With loglevel=6, as set per default in the Jaguar kernel since Feb 2025, USB-C DisplayPort Alternate Mode negotiation works reliably. Higher numbers can cause the negotiation to fail and/or need multiple retries.

The current loglevel can be seen in the first number in

cat /proc/sys/kernel/printk

You should see this, which means loglevel=6, which is good:

6  4  1  6

If you see a different value, upgrade your kernel, or add loglevel=6 to the APPEND line in /boot/extlinux/extlinux.conf and reboot.