5. Hardware Guide
This Hardware Guide provides information about the features, connectors
and signals available on the RK3399-Q7 module.
5.1. Qseven Implementation
Qseven has mandatory and optional features. Following table shows the feature set of the
RK3399-Q7 module compared to the minimum ARM/RISC based and maximum configuration according to
the Q7 standard.
| System I/O Interface |
Q7 Minimum |
RK3399-Q7 |
Q7 Maximum |
|---|
| PCI Express lanes |
0 |
4 |
4 |
| Serial ATA channels |
0 |
0 |
2 |
| USB 2.0 ports |
1 |
1 |
8 |
| USB 3.0 ports |
0 |
3 |
3 |
| LVDS channels |
0 |
0 |
2 |
| Embedded DisplayPort |
0 |
1 |
1 |
| MIPI_CSI |
0 |
2 |
2 |
| HDMI |
0 |
1 |
1 |
| High Definition Audio / AC‘97 / I2S |
0 |
1 |
1 |
| Ethernet 10/100/Gigabit |
0 |
1x Gigabit |
1x Gigabit |
| UART |
0 |
1 |
1 |
| GPIO |
0 |
8 |
8 |
| Secure Digital I/O |
0 |
1 |
1 |
| System Management Bus |
0 |
1 |
1 |
| I²C Bus |
1 |
4 |
4 |
| SPI Bus |
0 |
1 |
1 |
| CAN Bus |
0 |
1 |
1 |
| Watchdog Trigger |
1 |
1 |
1 |
| Power Button |
1 |
1 |
1 |
| Power Good |
1 |
1 |
1 |
| Reset Button |
1 |
1 |
1 |
| LID Button |
0 |
1 |
1 |
| Sleep Button |
0 |
1 |
1 |
| Suspend to RAM (S3 mode) |
0 |
1 |
1 |
| Wake |
0 |
1 |
1 |
| Battery low alarm |
0 |
1 |
1 |
| Thermal control |
0 |
1 |
1 |
| FAN control |
0 |
1 |
1 |
Note
The RK3399-Q7 module is available in different variants. This document describes the maximum configuration.
For details about orderable variants please refer to the order-code document.
5.2. Q7 Connector Pinout
The following table shows the signals on the edge connector of the RK3399-Q7 module.
Empty cells are not connected (NC) pins.
| Pin |
Signal |
Pin |
Signal |
|---|
| 1 |
GND |
2 |
GND |
| 3 |
GBE_MDI3- |
4 |
GBE_MDI2- |
| 5 |
GBE_MDI3+ |
6 |
GBE_MDI2+ |
| 7 |
GBE_LINK100# |
8 |
GBE_LINK1000# |
| 9 |
GBE_MDI1- |
10 |
GBE_MDIO0- |
| 11 |
GBE_MDI1+ |
12 |
GBE_MDIO0+ |
| 13 |
GBE_LINK# |
14 |
GBE_ACT# |
| 15 |
|
16 |
SUS_S5# |
| 17 |
WAKE# |
18 |
SUS_S3# |
| 19 |
GP0 |
20 |
PWRBTN# |
| 21 |
SLP_BTN# |
22 |
LID_BTN# |
| 23 |
GND |
24 |
GND |
| 25 |
GND |
26 |
PWGIN |
| 27 |
BATLOW# |
28 |
RSTBTN# |
| 29 |
|
30 |
|
| 31 |
|
32 |
|
| 33 |
|
34 |
GND |
| 35 |
|
36 |
|
| 37 |
|
38 |
|
| 39 |
GND |
40 |
GND |
| 41 |
BIOS_DISABLE# / BOOT_ALT# |
42 |
SDIO_CLK# |
| 43 |
SDIO_CD# |
44 |
SDIO_LED |
| 45 |
SDIO_CMD |
46 |
SDIO_WP |
| 47 |
SDIO_PWR# |
48 |
SDIO_DAT1 |
| 49 |
SDIO_DAT0 |
50 |
SDIO_DAT3 |
| 51 |
SDIO_DAT2 |
52 |
|
| 53 |
|
54 |
|
| 55 |
|
56 |
USB_OTG_PEN |
| 57 |
GND |
58 |
GND |
| 59 |
I2S_WS |
60 |
SMB_CLK / GP1_I2C_CLK |
| 61 |
I2S_RST# |
62 |
SMB_DAT / GP1_I2C_DAT |
| 63 |
I2S_CLK |
64 |
SMB_ALERT# |
| 65 |
I2S_SDI |
66 |
GP0_I2C_CLK |
| 67 |
I2S_SDO |
68 |
GP0_I2C_DAT |
| 69 |
THRM# |
70 |
WDTRIG# |
| 71 |
THRMTRIP# |
72 |
WDOUT |
| 73 |
GND |
74 |
GND |
| 75 |
USB_SSTX0- |
76 |
USB_SSRX0- |
| 77 |
USB_SSTX0+ |
78 |
USB_SSRX0+ |
| 79 |
|
80 |
|
| 81 |
USB_SSTX2- |
82 |
USB_SSRX2- |
| 83 |
USB_SSTX2+ |
84 |
USB_SSRX2+ |
| 85 |
USB_2_3_OC# |
86 |
USB_0_1_OC# |
| 87 |
USB_P3- |
88 |
USB_P2- |
| 89 |
USB_P3+ |
90 |
USB_P2+ |
| 91 |
USB_CC |
92 |
USB_ID |
| 93 |
USB_P1- |
94 |
USB_P0- |
| 95 |
USB_P1+ |
96 |
USB_P0+ |
| 97 |
GND |
98 |
GND |
| 99 |
LVDS_A0+ |
100 |
LVDS_B0+ |
| 101 |
LVDS_A0- |
102 |
LVDS_B0- |
| 103 |
LVDS_A1+ |
104 |
LVDS_B1+ |
| 105 |
LVDS_A1- |
106 |
LVDS_B1- |
| 107 |
LVDS_A2+ |
108 |
LVDS_B2+ |
| 109 |
LVDS_A2- |
110 |
LVDS_B2- |
| 111 |
LVDS_PPEN |
112 |
LVDS_BLEN |
| 113 |
LVDS_A3+ |
114 |
LVDS_B3+ |
| 115 |
LVDS_A3- |
116 |
LVDS_B3- |
| 117 |
GND |
118 |
GND |
| 119 |
LVDS_A_CLK+ |
120 |
LVDS_B_CLK+ |
| 121 |
LVDS_A_CLK- |
122 |
LVDS_B_CLK- |
| 123 |
LVDS_BLT_CTRL / GP_PWM_OUT0 |
124 |
GP_1-Wire_Bus |
| 125 |
GP2_I2C_DAT / LVDS_DID_DAT |
126 |
LVDS_BLC_DAT / eDP0_HPD# |
| 127 |
GP2_I2C_CLK / LVDS_DID_CLK |
128 |
LVDS_BLC_CLK |
| 129 |
CAN0_TX |
130 |
CAN0_RX |
| 131 |
TMDS_CLK+ |
132 |
USB_SSTX1- |
| 133 |
TMDS_CLK- |
134 |
USB_SSTX1+ |
| 135 |
GND |
136 |
GND |
| 137 |
TMDS_LANE1+ |
138 |
|
| 139 |
TMDS_LANE1- |
140 |
|
| 141 |
GND |
142 |
GND |
| 143 |
TMDS_LANE0+ |
144 |
USB_SSRX1- |
| 145 |
TMDS_LANE0- |
146 |
USB_SSRX1+ |
| 147 |
GND |
148 |
GND |
| 149 |
TMDS_LANE2+ |
150 |
HDMI_CTRL_DAT |
| 151 |
TMDS_LANE2- |
152 |
HDMI_CTRL_CLK |
| 153 |
DP_HDMI_HPD# |
154 |
|
| 155 |
PCIE_CLK_REF+ |
156 |
PCIE_WAKE# |
| 157 |
PCIE_CLK_REF- |
158 |
PCIE_RST# |
| 159 |
GND |
160 |
GND |
| 161 |
PCIE3_TX+ |
162 |
PCIE3_RX+ |
| 163 |
PCIE3_TX- |
164 |
PCIE3_RX- |
| 165 |
GND |
166 |
GND |
| 167 |
PCIE2_TX+ |
168 |
PCIE2_RX+ |
| 169 |
PCIE2_TX- |
170 |
PCIE2_RX- |
| 171 |
UART0_TX |
172 |
UART0_RTS# |
| 173 |
PCIE1_TX+ |
174 |
PCIE1_RX+ |
| 175 |
PCIE1_TX- |
176 |
PCIE1_RX- |
| 177 |
UART0_RX |
178 |
UART0_CTS# |
| 179 |
PCIE0_TX+ |
180 |
PCIE0_RX+ |
| 181 |
PCIE0_TX- |
182 |
PCIE0_RX- |
| 183 |
GND |
184 |
GND |
| 185 |
GPIO0 |
186 |
GPIO1 |
| 187 |
GPIO2 |
188 |
GPIO3 |
| 189 |
GPIO4 |
190 |
GPIO5 |
| 191 |
GPIO6 |
192 |
GPIO7 |
| 193 |
VCC_BAT |
194 |
SPKR / GP_PWM_OUT2 |
| 195 |
FAN_TACHOIN / GP_TIMER_IN |
196 |
FAN_PWMOUT / GP_PWM_OUT1 |
| 197 |
GND |
198 |
GND |
| 199 |
SPI_MOSI |
200 |
SPI_CS0# |
| 201 |
SPI_MISO |
202 |
SPI_CS1# |
| 203 |
SPI_SCK |
204 |
|
| 205 |
|
206 |
|
| 207 |
|
208 |
|
| 209 |
|
210 |
|
| 211 |
|
212 |
|
| 213 |
|
214 |
|
| 215 |
|
216 |
|
| 217 |
|
218 |
|
| 219 |
VCC |
220 |
VCC |
| 221 |
VCC |
222 |
VCC |
| 223 |
VCC |
224 |
VCC |
| 225 |
VCC |
226 |
VCC |
| 227 |
VCC |
228 |
VCC |
| 229 |
VCC |
230 |
VCC |
5.3. MIPI-CSI Feature Interface Pinout
The following table shows the signals on the MIPI-CSI feature interface connector.
On the SoM a FCI 62684-36210E9ALF connector with top-side contacts is used.
Empty cells are not connected (NC) pins.
| F1 |
CAM_PWR |
| F2 |
CAM_PWR |
| F3 |
CAM0_CSI_D0+ |
| F4 |
CAM0_CSI_D0- |
| F5 |
GND |
| F6 |
CAM0_CSI_D1+ |
| F7 |
CAM0_CSI_D1- |
| F8 |
GND |
| F9 |
CAM0_CSI_D2+ |
| F10 |
CAM0_CSI_D2- |
| F11 |
CAM0_RST# |
| F12 |
CAM0_CSI_D3+ |
| F13 |
CAM0_CSI_D3- |
| F14 |
GND |
| F15 |
CAM0_CSI_CLK+ |
| F16 |
CAM0_CSI_CLK- |
| F17 |
GND |
| F18 |
CAM0_I2C_CLK |
| F19 |
CAM0_I2C_DAT |
| F20 |
CAM0_ENA# |
| F21 |
MCLK |
| F22 |
|
| F23 |
|
| F24 |
|
| F25 |
GND |
| F26 |
|
| F27 |
|
| F28 |
GND |
| F29 |
|
| F30 |
|
| F31 |
GND |
| F32 |
|
| F33 |
|
| F34 |
GND |
| F35 |
CAM0_GPIO |
| F36 |
CAM1_GPIO |
5.4. Signal Details
5.4.1. Ethernet
| Signal |
Type |
Signal Level |
Description |
|---|
| GBE_MDI[0:3]+
GBE_MDI[0:3]- |
I/O |
Analog |
Gigabit Ethernet Controller:
Media Dependent Interface Differential Pairs 0,1,2,3.
The MDI can operate in 1000, 100 and 10 Mbit/sec modes |
| GBE_ACT# |
OC |
3.3V |
Gigabit Ethernet Controller activity indicator, active low |
| GBE_LINK# |
OC |
3.3V |
Gigabit Ethernet Controller link indicator, active low |
| GBE_LINK100# |
OC |
3.3V |
Internally connected to GBE_LINK# |
| GBE_LINK1000# |
OC |
3.3V |
Internally connected to GBE_LINK# |
| GBE_CTREF |
REF |
Analog |
Center Tap Voltage |
5.4.2. USB
| Signal |
Type |
Signal Level |
Description |
|---|
| USB_P[0:2]+
USB_P[0:2]- |
I/O |
USB |
High speed universal Serial Bus Port 0, 1, 2 differential pairs |
| USB_SSTX[0:2]+
USB_SSTX[0:2]- |
I/O |
USB |
Super speed universal Serial Bus Port 0, 1, 2 transmit differential pairs |
| USB_SSRX[0:2]+
USB_SSRX[0:2]- |
I/O |
USB |
Super speed universal Serial Bus Port 0, 1, 2 receive differential pairs |
| USB_0_1_OC# |
I |
3.3V |
Over current detect input 1. This pin is used to monitor the USB power over
current of the USB Ports 0 and 1 |
| USB_2_3_OC# |
I |
3.3V |
Over current detect input 1. This pin is used to monitor the USB power over
current of the USB Ports 2 and 3 |
| USB_ID |
I |
3.3V |
Configures the mode of the USB Port 1. If the signal is active high the Port
will be configured as USB Client |
| USB_VBUS |
I |
5.0V |
USB VBUS pin, 5V tolerant |
| USB_OTG_PEN |
O |
3.3V |
USB Power enable for OTG port USB 1 |
5.4.3. SDIO
| Signal |
Type |
Signal Level |
Description |
|---|
| SDIO_CD# |
I |
3.3V |
SDIO Card Detect. This signal indicates when a SDIO/MMC card is present |
| SDIO_CLK |
O |
3.3V |
SDIO Clock |
| SDIO_CMD |
I/O |
3.3V |
SDIO Command/Response |
| SDIO_LED |
O |
3.3V |
SDIO LED. Used to drive an external LED to indicate transfers on the bus |
| SDIO_WP |
I |
3.3V |
SDIO Write Protect |
| SDIO_PWR# |
O |
3.3V |
SDIO Power Enable. This signal is used to enable the power being supplied to a
SD/MMC card device |
| SDIO_DAT0-4 |
I/O |
3.3V |
SDIO Data lines |
5.4.4. I2C
| Signal |
Type |
Signal Level |
Description |
|---|
| Q7_I2C_CLK |
O |
3.3V |
I2C bus clock line connected to RK3399 |
| Q7_I2C_DAT |
I/O |
3.3V |
I2C bus data line connected to RK3399 |
| LVDS_DID_CLK
/GP2_I2C_CLK |
O |
3.3V |
I2C bus clock line connected to RK3399 |
| LVDS_DID_DAT
/GP2_I2C_DAT |
I/O |
3.3V |
I2C bus data line connected to RK3399 |
| SMB_CLK
GP1_I2C_CLK |
O |
3.3V |
Clock line of System Management Bus. Alternate function I2C Bus clock line |
| SMB_DAT
GP1_I2C_DAT |
I/O |
3.3V |
Data line of System Management Bus. Alternate function I2C Bus data line |
| LVDS_BLC_DAT |
O |
3.3V |
I2C bus clock line connected to RK3399, Kerkey and baseboard EEPROM |
| LVDS_BLC_CLK |
I/O |
3.3V |
I2C bus data line connected to RK3399, Kerkey and baseboard EEPROM |
5.4.5. I2S
| Signal |
Type |
Signal Level |
Description |
|---|
| I2S_RST# |
O |
3.3V |
I2S Codec Reset |
| I2S_WS |
O |
3.3V |
I2S Word Select |
| I2S_CLK |
O |
3.3V |
I2S Serial Data Clock |
| I2S_SDO |
O |
3.3V |
I2S Serial Data Output |
| I2S_SDI |
I |
3.3V |
I2S Serial Data Input |
5.4.6. HDMI
| Signal |
Type |
Signal Level |
Description |
|---|
| TMDS_CLK+
TMDS_CLK- |
O |
TMDS |
TMDS differential pair clock lines |
| TMDS_LANE[0:2]+
TMDS_LANE[0:2]- |
O |
TMDS |
TMDS differential pair lanes 0, 1, 2 |
| HDMI_CTRL_CLK |
O |
3.3V |
DDC based control signal (clock) for HDMI device |
| HDMI_CTRL_DAT |
I/O |
3.3V |
DDC based control signal (data) for HDMI device |
| HDMI_HPD# |
I |
3.3V |
Hot plug detection signal |
5.4.7. Video
The RK3399-Q7 does not feature LVDS as the CPU lacks this interface. Instead
the Qseven LVDS pins are used for MIDI-DSI. These signals are electrical
compatible but are not defined in the Qseven standard.
| Q7 Pin |
Function |
Alternate Function |
|---|
| LVDS_A0_P |
MIPI_TX0_D0P |
EDP_TX0_P |
| LVDS_A0_N |
MIPI_TX0_D0N |
EDP_TX0_N |
| LVDS_A1_P |
MIPI_TX0_D1P |
EDP_TX1_P |
| LVDS_A1_N |
MIPI_TX0_D1N |
EDP_TX1_N |
| LVDS_A2_P |
MIPI_TX0_D2P |
EDP_TX2_P |
| LVDS_A2_N |
MIPI_TX0_D2N |
EDP_TX2_N |
| LVDS_A3_P |
MIPI_TX0_D3P |
EDP_TX3_P |
| LVDS_A3_N |
MIPI_TX0_D3N |
EDP_TX3_N |
| LVDS_A_CLK_P |
MIPI_TX0_CLKP |
EDP_AUX_P |
| LVDS_A_CLK_N |
MIPI_TX0_CLKN |
EDP_AUX_N |
| LVDS_B0_P |
MIPI_TX1/RX1_D0P |
|
| LVDS_B0_N |
MIPI_TX1/RX1_D0N |
|
| LVDS_B1_P |
MIPI_TX1/RX1_D1P |
|
| LVDS_B1_N |
MIPI_TX1/RX1_D1N |
|
| LVDS_B2_P |
MIPI_TX1/RX1_D2P |
|
| LVDS_B2_N |
MIPI_TX1/RX1_D2N |
|
| LVDS_B3_P |
MIPI_TX1/RX1_D3P |
|
| LVDS_B3_N |
MIPI_TX1/RX1_D3N |
|
| LVDS_B_CLK_P |
MIPI_TX1/RX1_CLKP |
|
| LVDS_B_CLK_N |
MIPI_TX1/RX1_CLKN |
|
The LVDS A pins are muxed between MIPI_TX0 and eDP on the Module. The active
function is selected with a GPIO pin.
| Function |
CPU Pin |
Linux GPIO # |
|---|
| LVDS A Mux |
GPIO2_A2 |
34 |
| LVDS A Mux |
Function |
|---|
| 0 |
MIPI |
| 1 |
eDP |
In addition to the Qseven edge connector there is an additional MIPI-CSI port
accessiable via the MIPI-CSI feature interface.
| Signal |
Type |
Signal Level |
Description |
|---|
| CAM_PWR |
P |
3.3V |
3.3V supply to power the camera |
| CAM0_CSI_D[0:3]+
CAM0_CSI_D[0:3]- |
I |
D-PHY |
CSI2 Camera 0 Data Lane differential pairs |
| CAM0_CSI_CLK+
CAM0_CSI_CLK- |
I |
D-PHY |
CSI2 Camera 0 Clock Lane differential pairs |
| CAM0_I2C_CLK |
I/O |
1.8V |
CSI2 Camera 0 Control Interface Clock |
| CAM0_I2C_DAT |
I/O |
1.8V |
CSI2 Camera 0 Control Interface Data |
| CAM0_RST# |
I/O |
1.8V |
CSI2 Camera 0 Reset (low active) |
| CAM0_ENA# |
I/O |
1.8V |
CSI2 Camera 0 Enable (low active) |
| MCLK |
O |
1.8V |
CSI2 Camera 0 Master Clock |
| CAM[0:1]_GPIO |
I/O |
1.8V |
GPIO for Camera |
5.4.8. GPIO
| Signal |
Type |
Signal Level |
Description |
|---|
| GPIO[0-7] |
I/O |
3.3V |
General purpose inputs/outputs 0 to 7 |
5.4.9. CAN
| Signal |
Type |
Signal Level |
Description |
|---|
| CAN0_TX |
O |
3.3V |
CAN (Controller Area Network) TX output for CAN Bus channel 0 |
| CAN0_RX |
I |
3.3V |
CAN (Controller Area Network) RX input for CAN Bus channel 0 |
5.4.10. SPI
| Signal |
Type |
Signal Level |
Description |
|---|
| SPI_MOSI |
O |
3.3V |
Master serial output/Slave serial input signal |
| SPI_MISO |
I |
3.3V |
Master serial input/Slave serial output signal |
| SPI_SCK |
O |
3.3V |
SPI clock output |
| SPI_CS0# |
O |
3.3V |
SPI chip select 0 output |
| SPI_CS1# |
O |
3.3V |
SPI chip select 1 output (used when two devices are
connected) |
5.4.11. UART
| Signal |
Type |
Signal Level |
Description |
|---|
| UART0_TX |
O |
3.3V |
Serial data transmit |
| UART0_RX |
I |
3.3V |
Serial data receive |
| UART0_CTS# |
I |
3.3V |
Handshake signal: ready to send data |
| UART0_RTS# |
O |
3.3V |
Handshake signal: ready to receive data |
5.4.12. Misc
| Signal |
Type |
Signal Level |
Description |
|---|
| WDTRIG# |
I |
3.3V |
Watchdog trigger signal |
| WDOUT |
O |
3.3V |
Watchdog event indicator |
| SMB_CLK
GP1_I2C_CLK |
O |
3.3V |
Clock line of System Management Bus. Alternate function I2C Bus clock line |
| SMB_DAT
GP1_I2C_DAT |
I/O |
3.3V |
Data line of System Management Bus. Alternate function I2C Bus data line |
| SMB_ALERT# |
I |
3.3V |
System Management Bus Alert input |
| SPKR
GP_PWM_OUT2 |
O |
3.3V |
PC speaker (buzzer) output. Alternate function general purpose PWM output |
| BIOS_DISABLE#
/BOOT_ALT# |
I |
3.3V |
Disables the onboard bootloader and uses the one the SD card instead. If no
bootloader is available on the SD card it falls back to USB recovery mode |
| GP_1-Wire_Bus |
I/O |
3.3V |
General Purpose 1-Wire bus interface |
| THRM# |
I |
3.3V |
Thermal Alarm active low signal generated by the external hardware to indicate an
over temperature situation. This signal can be used to initiate thermal
throttling |
| THRMTRIP# |
O |
3.3V |
Thermal Trip indicates an overheating condition of the processor. If ‘THRMTRIP#’
goes active the system immediately transitions to the S5 State (Soft Off) |
| FAN_PWMOUT
/GP_PWM_OUT1 |
O |
3.3V |
PWM output for fan speed control. Alternate function general purpose PWM output.
Function based on microcontroller firmware |
| FAN_TACHOIN
/GP_TIMER_IN |
I |
3.3V |
Fan tachometer input. Alternate function general purpose timer input.
Function based on microcontroller firmware |
5.4.13. Power Management
| Signal |
Type |
Signal Level |
Description |
|---|
| RSTBTN# |
I |
3.3V |
Reset button input. An active low signal resets the module |
| BATLOW# |
I |
3.3V |
Battery low input |
| WAKE# |
I |
3.3V |
External system wake event. An active low signal wakes the module from a sleep
state |
| SUS_S3# |
O |
3.3V |
Indicated that the system is in suspend to ram (S3) |
| SUS_S5# |
O |
3.3V |
Indicated that the system is in soft-off state (S5) |
| SLP_BTN# |
I |
3.3V |
Sleep button. Signals the system with an falling edge to transition into sleep or
wake from a sleep state |
| LID_BTN# |
I |
3.3V |
LID button. Low active signal to detect a LID switch to transition into sleep or
wake from a sleep state |
5.4.14. Power
| Signal |
Nominal Input |
Description |
|---|
| VCC |
5V |
Main supply for the module |
| VCC_RTC |
3V |
Backup supply for the RTC. If not used it can be left unconnected. Typical current: 1.4uA |
5.5. On-board Devices
5.5.1. Power-Manager
The Rockchip RK808 is connected to the CPU via RSB and an interrupt line:
| RK808 Pin |
Function |
CPU Pin |
|---|
| 19 |
SCL |
I2C0_SCL_u (ball N30) |
| 18 |
SDA |
I2C0_SDA_u (ball M26) |
| 49 |
IRQ |
GPIO1_C6 (ball L25) |
5.5.2. DDR3
- 4GB RAM of DDR3-1600 (2 independent channels, each 32-bit wide)
5.5.3. eMMC
- eMMC connected through the 8-bit wide SDIO interface EMMC_D on the CPU.
| Signal |
CPU Pin |
Linux GPIO # |
|---|
| RESET |
GPIO0_A5 |
5 |
5.5.4. NOR Flash
- 32 MiB serial NOR flash
- Connected to the CPU via SPI1:
| Signal |
CPU Pin |
|---|
| CLK |
GPIO_B1 (ball P28) |
| MOSI |
GPIO_B0 (ball R31) |
| MISO |
GPI1_A7 (ball P27) |
| CS |
GPIO_B2 (ball P29) |
5.5.5. Companion Controller
The on-board microcontroller provides additional features to the CPU, exposed via I2C
and USB. It emulates standard ICs and does not need custom drivers in Linux.
| Feature |
CPU Connection |
Emulated IC |
Qseven Pins |
|---|
| RTC |
I2C |
ISL1208 |
none |
| Temperature sensor
and fan controller |
I2C |
AMC6821 |
FAN_TACHOIN, FAN_PWMOUT |
| CAN |
USB |
UCAN |
CAN0_TX, CAN0_RX |
The STM32-microcontroller can be flashed from the CPU by taking it into DFU mode (USB recovery).
Pull BOOT0 low and cycle reset (GPIOs listed below). The microcontroller will appear as a new USB device
in Linux.
| Function |
CPU Pin |
Linux GPIO # |
|---|
| NRST |
GPIO1_D0 |
56 |
| BOOT0 |
GPIO2_B4 |
76 |
5.5.6. Ethernet PHY
The Micrel KSZ9031RNX is connected to the CPU via RGMII and MDIO.
Further connections are shown below.
| PHY signal |
Connected to |
Linux GPIO # |
|---|
| RESET |
CPU pin GPIO3_C0 |
112 |
| MDIO |
CPU pin GPIO3_B5 |
107 |
| MDC |
CPU pin GPIO3_B0 |
102 |
| LED1 |
Qseven GBE_LINK1000 and GBE_LINK100 and GBE_LINK (tied together) |
|
| LED2 |
Qseven GBE_ACT |
|
5.5.7. Test points
| Test point |
Connected to |
|---|
| TP1 |
STM32 USART2 TX |
| TP2 |
STM32 USART2 RX |
| TP3 |
GND |
5.6. USB
The RK3399 CPU has two USB 3.0 SuperSpeed controllers. A USB 3.0 hub provides
two additional USB 3.0 super-speed ports.
The routing of Qseven signals to CPU and/or hub port is shown below. The Linux Port # column shows
the identifier that is used in Linux dmesg output. The format is: “usb BUS#-1.HUBPORT#”
| Qseven Port # |
Speed |
Connected to |
Linux Port # |
Notes |
|---|
| USB_P0 |
USB 2.0 Hi-Speed |
Hub |
usb 7-1.1 |
|
| USB_P1 |
USB 2.0 Hi-Speed |
CPU |
usb 5-1 |
OTG Port |
| USB_P2 |
USB 2.0 Hi-Speed |
Hub |
usb 7-1.2 |
|
| USB_P3 |
USB 2.0 Hi-Speed |
Hub |
usb 7-1.3 |
|
| USB_SSTX0 / USB_SSRX0 |
USB 3.0 SuperSpeed |
Hub |
usb 8-1.1 |
Use together with USB_P0 |
| USB_SSTX1 / USB_SSRX1 |
USB 3.0 SuperSpeed |
CPU |
usb 6-1 |
Use together with USB_P1 |
| USB_SSTX2 / USB_SSRX2 |
USB 3.0 SuperSpeed |
Hub |
usb 8-1.2 |
Use together with USB_P2 |
The lsusb -t command shows the
USB topology in a tree view and is highly recommended. It’s output is discussed below,
for a RK3399-Q7 module without additional devices connected:
Bus 07 and Bus 08 are connected to the USB 3.0 hub. The CAN controller is connected
to Port 4 on the hub:
lsusb -t
/: Bus 08.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
|__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/4p, 5000M
/: Bus 07.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M
|__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/4p, 480M
|__ Port 4: Dev 3, If 0, Class=, Driver=uCAN, 12M
Linux Bus 05 and Bus 06 are routed directly to the Qseven
ports USB_P1 and USB_SSTX1 / USB_SSRX1:
/: Bus 06.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
/: Bus 05.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M
Additional internal USB 2.0 busses, currently unused:
/: Bus 04.Port 1: Dev 1, Class=root_hub, Driver=ohci-platform/1p, 12M
/: Bus 03.Port 1: Dev 1, Class=root_hub, Driver=ohci-platform/1p, 12M
/: Bus 02.Port 1: Dev 1, Class=root_hub, Driver=ehci-platform/1p, 480M
/: Bus 01.Port 1: Dev 1, Class=root_hub, Driver=ehci-platform/1p, 480M
The USB hub can be held in reset, if required. This disables all USB ports connected
to the hub. The reset signal routing is shown below:
| Hub signal |
CPU Pin |
Linux GPIO # |
|---|
| USBHUB_RESETn |
GPIO4_A3 |
131 |
5.7. Using Qseven Signals as GPIO
Most Qseven signals can be reused as general purpose pin. Following
table shows the mapping and the possible direction between the edge
connector and the SoC.
| Qseven Pin |
Signal |
CPU Pin |
Linux GPIO # |
Direction |
|---|
| 16 |
SUS_S5# |
GPIO1_A1 |
33 |
Output |
| 17 |
WAKE# |
GPIO0_B1 |
9 |
Input |
| 18 |
SUS_S3# |
GPIO1_A0 |
32 |
Output |
| 19 |
GPO0 |
GPIO2_B3 |
75 |
Output |
| 21 |
SLP_BTN# |
GPIO0_B3 |
11 |
Input |
| 22 |
LID_BTN# |
GPIO0_A4 |
4 |
Input |
| 27 |
BATLOW# |
GPIO0_B2 |
10 |
Input |
| 42 |
SDIO_CLK# |
GPIO4_B4 |
140 |
Bidirectional |
| 43 |
SDIO_CD# |
GPIO0_A7 |
7 |
Input |
| 44 |
SDIO_LED |
GPIO1_A2 |
34 |
Output |
| 45 |
SDIO_CMD |
GPIO4_B5 |
141 |
Bidirectional |
| 46 |
SDIO_WP |
GPIO0_B5 |
13 |
Input |
| 47 |
SDIO_PWR# |
GPIO1_C1 |
49 |
Output |
| 48 |
SDIO_DAT1 |
GPIO4_B1 |
137 |
Bidirectional |
| 49 |
SDIO_DAT0 |
GPIO4_B0 |
136 |
Bidirectional |
| 50 |
SDIO_DAT3 |
GPIO4_B3 |
139 |
Bidirectional |
| 51 |
SDIO_DAT2 |
GPIO4_B2 |
138 |
Bidirectional |
| 56 |
USB_OTG_PEN |
GPIO0_A2 |
2 |
Output |
| 59 |
I2S_WS |
GPIO3_D2 |
122 |
Output |
| 60 |
SMB_CLK /
GP1_I2C_CLK |
GPIO2_A1 |
65 |
Bidirectional |
| 61 |
I2S_RST# |
GPIO4_A5 |
133 |
Output |
| 62 |
SMB_DAT /
GP1_I2C_DAT |
GPIO2_A0 |
64 |
Bidirectional |
| 63 |
I2S_CLK |
GPIO3_D0 |
120 |
Output |
| 64 |
SMB_ALERT# |
GPIO0_B4 |
12 |
Input |
| 65 |
I2S_SDI |
GPIO3_D3 |
123 |
Input |
| 66 |
GP0_I2C_CLK |
GPIO1_B4 |
44 |
Bidirectional |
| 67 |
I2S_SDO |
GPIO3_D7 |
127 |
Output |
| 68 |
GP0_I2C_DAT |
GPIO1_B3 |
43 |
Bidirectional |
| 69 |
THRM# |
GPIO0_A3 |
3 |
Input |
| 71 |
THRMTRIP# |
GPIO1_A3 |
35 |
Output |
| 111 |
LVDS_PPEN |
GPIO4_D6 |
158 |
Output |
| 112 |
LVDS_BLEN |
GPIO1_C7 |
55 |
Bidirectional |
| 123 |
LVDS_BLT_CTRL /
GP_PWM_OUT0 |
GPIO4_C2 |
146 |
Output |
| 124 |
GP_1-Wire_Bus |
GPIO4_C7 |
151 |
Bidirectional |
| 125 |
GP2_I2C_DAT /
LVDS_DID_DAT |
GPIO4_A1 |
129 |
Bidirectional |
| 127 |
GP2_I2C_CLK /
LVDS_DID_CLK |
GPIO4_A2 |
130 |
Bidirectional |
| 150 |
HDMI_CTRL_DAT |
GPIO4_C0 |
144 |
Bidirectional |
| 152 |
HDMI_CTRL_CLK |
GPIO4_C1 |
145 |
Bidirectional |
| 156 |
PCIE_WAKE# |
GPIO2_D2 |
90 |
Input |
| 158 |
PCIE_RST# |
GPIO4_C6 |
150 |
Output |
| 171 |
UART0_TX |
GPIO2_C1 |
81 |
Output |
| 172 |
UART0_RTS# |
GPIO2_C3 |
83 |
Output |
| 177 |
UART0_RX |
GPIO2_C0 |
80 |
Input |
| 178 |
UART0_CTS# |
GPIO2_C2 |
82 |
Input |
| 185 |
GPIO0 |
GPIO4_D4 |
156 |
Bidirectional |
| 186 |
GPIO1 |
GPIO4_D1 |
153 |
Bidirectional |
| 187 |
GPIO2 |
GPIO4_D0 |
152 |
Bidirectional |
| 188 |
GPIO3 |
GPIO4_D5 |
157 |
Bidirectional |
| 189 |
GPIO4 |
GPIO4_D2 |
154 |
Bidirectional |
| 190 |
GPIO5 |
GPIO4_C4 |
156 |
Bidirectional |
| 191 |
GPIO6 |
GPIO4_C3 |
147 |
Bidirectional |
| 192 |
GPIO7 |
GPIO4_D3 |
155 |
Bidirectional |
| 199 |
SPI_MOSI |
GPIO2_C5 |
85 |
Output |
| 200 |
SPI_CS0# |
GPIO2_C7 |
87 |
Output |
| 201 |
SPI_MISO |
GPIO2_C4 |
84 |
Input |
| 202 |
SPI_CS1# |
GPIO2_D0 |
88 |
Output |
| 203 |
SPI_SCK |
GPIO2_C6 |
86 |
Output |
| F11 |
CAM0_RST# |
GPIO3_D4 |
124 |
Bidirectional |
| F18 |
CAM0_I2C_CLK |
GPIO2_B2 |
74 |
Bidirectional |
| F19 |
CAM0_I2C_DAT |
GPIO2_B1 |
73 |
Bidirectional |
| F20 |
CAM0_ENA# |
GPIO4_C5 |
149 |
Bidirectional |
| F35 |
CAM0_GPIO |
GPIO3_D1 |
122 |
Bidirectional |
| F36 |
CAM1_GPIO |
GPIO4_A4 |
132 |
Bidirectional |
5.8. Electrical Specification
5.8.1. Power Supply
The power supply requirements are listed in the table below and are
identical to the Qseven specification.
| Rail |
Description |
Nominal voltage |
Tolerance |
|---|
| VCC |
Main power supply |
5V |
4.75 … 5.25V |
| VCC_RTC |
Backup battery |
3V |
2.4 … 3.3V |
5.9. Mechanical Specification
5.9.1. Module Dimensions
The mechanical dimensions of the module are shown below.
5.9.2. Baseboard Dimensions
The mechanical dimensions of the baseboard are conform with the form factor for Mini-ITX and
it can be mounted in a standard Mini-ITX PC Case.
